Lattice Mapping Report File for Design Module 'SerialTest_impl_1' Target Vendor: LATTICE Target Device: iCE40UP5KSG48 Target Performance: High-Performance_1.2V Mapper: version Radiant (64-bit) 1.0.1.350.6 Mapped on: Mon Nov 19 22:19:23 2018 Design Information Command line: map SerialTest_impl_1_syn.udb W:/projects/Ice40SerialTest/source/pins.pdc -o SerialTest_impl_1.udb -gui Design Summary Number of slice registers: 123 out of 5280 (2%) Number of I/O registers: 1 out of 117 (1%) Number of LUT4s: 202 out of 5280 (4%) Number of logic LUT4s: 145 Number of replicated LUT4s: 1 Number of ripple logic: 28 (56 LUT4s) Number of IO sites used: 6 out of 39 (15%) Number of IO sites used for general PIOs: 3 Number of IO sites used for I3Cs: 0 out of 2 (0%) Number of IO sites used for PIOs+I3Cs: 3 out of 36 (8%) (note: If I3C is not used, its site can be used as general PIO) Number of IO sites used for OD+RGB IO buffers: 3 out of 3 (100%) Number of DSPs: 0 out of 8 (0%) Number of I2Cs: 0 out of 2 (0%) Number of High Speed OSCs: 0 out of 1 (0%) Number of Low Speed OSCs: 0 out of 1 (0%) Number of RGB PWM: 0 out of 1 (0%) Number of RGB Drivers: 1 out of 1 (100%) Number of SCL FILTERs: 0 out of 2 (0%) Number of SRAMs: 1 out of 4 (25%) Number of WARMBOOTs: 0 out of 1 (0%) Number of SPIs: 0 out of 2 (0%) Number of EBRs: 0 out of 30 (0%) Number of PLLs: 0 out of 1 (0%) Number of Clocks: 1 Net clk_c: 106 loads, 106 rising, 0 falling (Driver: Port clk) Number of Clock Enables: 16 Net VCC_net: 2 loads, 0 SLICEs Net n1568: 7 loads, 7 SLICEs Net sender/n1506: 4 loads, 4 SLICEs Net sender/n1572: 3 loads, 3 SLICEs Net sender/clk_c_enable_1: 1 loads, 0 SLICEs Net sender/n2499: 1 loads, 1 SLICEs Net n940: 8 loads, 8 SLICEs Net n1131: 14 loads, 14 SLICEs Net ram_maskwe[3]: 2 loads, 0 SLICEs Net ram_maskwe[1]: 2 loads, 0 SLICEs Net ram_we: 1 loads, 0 SLICEs Net n1508: 1 loads, 1 SLICEs Net n1526: 8 loads, 8 SLICEs Net n2592: 1 loads, 1 SLICEs Net receiver/n1477: 7 loads, 7 SLICEs Net receiver/n1507: 3 loads, 3 SLICEs Number of LSRs: 10 Net sender/n1694: 4 loads, 4 SLICEs Net sender/n1693: 3 loads, 3 SLICEs Net n1700: 12 loads, 12 SLICEs Net reset: 6 loads, 6 SLICEs Net n1220: 1 loads, 1 SLICEs Net download_done: 1 loads, 1 SLICEs Net n1223: 1 loads, 1 SLICEs Net n1679: 8 loads, 8 SLICEs Net n1360: 1 loads, 1 SLICEs Net receiver/n2749: 1 loads, 1 SLICEs Top 10 highest fanout non-clock nets: Net VCC_net: 45 loads Net high_byte: 33 loads Net n1131: 29 loads Net n755: 21 loads Net n3512[1]: 20 loads Net n938: 18 loads Net receiver/n768[2]: 14 loads Net download_done: 12 loads Net n1700: 12 loads Net n769: 12 loads Number of warnings: 0 Number of errors: 0 Design Errors/Warnings No errors or warnings present. IO (PIO) Attributes +---------------------+-----------+-----------+ | IO Name | Direction | Levelmode | | | | IO_TYPE | +---------------------+-----------+-----------+ | led_blue | OUTPUT | LVCMOS33 | +---------------------+-----------+-----------+ | led_green | OUTPUT | LVCMOS33 | +---------------------+-----------+-----------+ | led_red | OUTPUT | LVCMOS33 | +---------------------+-----------+-----------+ | rxd | OUTPUT | LVCMOS33 | +---------------------+-----------+-----------+ | clk | INPUT | LVCMOS33 | +---------------------+-----------+-----------+ | txd | INPUT | LVCMOS33 | +---------------------+-----------+-----------+ Removed logic Signal GND_net undriven or does not drive anything - clipped. Block i1 was optimized away. ASIC Components --------------- Instance Name: sender.tx_56 Type: IOLOGIC Instance Name: ram Type: SRAM Instance Name: rgb_led_RGB_CORE_inst Type: RGBA_DRV Instance Name: receiver.rx_latch_55 Type: IOLOGIC Run Time and Memory Usage ------------------------- Total CPU Time: 0 secs Total REAL Time: 0 secs Peak Memory Usage: 65 MB Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2018 Lattice Semiconductor Corporation, All rights reserved.