0.2: first version
0.3: bugfixing timing problems with hardware masters, changed file structure
0.4: bugfixing support for slave sending multiple bytes, adding Spartan3 Starter Kit project
This project provides an I2C slave entity for standard and fast mode transfer. It was tested with an ARM PXA hardware master in fast mode (400 kBit/s) and a HCS08 master with standard mode (100 kBit/s). Lower frequencies are possible. See the sources for detailed description and the PCA9555 implementation for an example how to use it. Device utilization on the Cyclone I (EP1C6Q240C8) for the I2C slave and the PCA9555 is 296 (151 for the I2C entity) logic elements out of 5,980 (5%). For the Spartan 3 (xc3s200-4ft256) the device utilization is 249 LUTs out of 3,840 (6%).
Testbench for the i2c_slave entity
i2c_slave entity implementation.
A limited (no interrupts) implementation of the PCA9555 GPIO IC .
Test for the Terasic TREX C1 Multimedia Development Kit
Test for the Spartan 3 Start Kit
Test for the Softec PK-HCS08GB60 starter kit with the Freescale MC9S08GB60, which sends and receives data from the T-Rex board and the Spartan 3 board with its hardware I2C master, compiled with ICC08 . Output file test.hex in Intel Hex included.
Project files for Quartus II 6.
Project files for ISE Web Pack 8.2.
The HCS08 sends the address 0x26, 0x07 for configuring the config register in the emulated PCA9555 and a 0 byte for setting the direction for port 1 to output:
The address 0x26, 0x03 for output port 1 and some bit pattern, which is incremented with 8 Hz, is sent to the PCA9555. The contents of port 1 is displayed with the LEDs on the TREX board
The address 0x26, 0x00 for reading port 0 is sent. After this a repeated start bit is sent, address 0x26, with read bit set. The PCA9555 sends the answer, which is the state of the push buttons and the dip switches.